Electronic component and method for manufacturing the same

ABSTRACT

An electronic component is provided with a first conductor, an insulator for covering a surface of the first conductor, a via hole penetrating the insulator, and a second conductor located on a surface of the insulator and electrically connected to the first conductor through the via hole, and includes a shielding film having conductivity, being interposed between the first conductor and the second conductor, and covering an interface between the first conductor and the insulator in the via hole by extending continuously at least from the surface of the first conductor constituting a bottom surface of the via hole to an inner wall surface of the via hole.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of and claims the benefit of priorityunder 35 U.S.C.§120 from U.S. Ser. No. 12/100,039, filed Apr. 9, 2008.U.S. Ser. No. 12/100,039 claims the benefit of priority under 35U.S.C.§119 from Japanese Patent Application No. 2007-115881, filed Apr.25, 2007. The present invention is related to U.S. patent applicationSer. No. 12/029,756 entitled “ELECTRONIC COMPONENT AND METHOD FORMANUFACTURING THE SAME” filed on Feb. 12, 2008 (claiming the ConventionPriority based on Japanese patent application 2007-89899 filed on Mar.29, 2007). The disclosures of both of the above U.S. applications areincorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates to an electronic component and a methodfor manufacturing the same. More specifically, the present inventionrelates to a technique for improving reliability of an electroniccomponent, which is formed by laminating a conducting film and aninsulating film, by enhancing resistance of an interlayer connector.

Today, there are offered various discrete components such as chipcapacitors, chip inductors or chip resistors and various chip electroniccomponents such as electronic devices each including a combination ofmultiple active elements and passive elements (hereinafter also simplyreferred to as chips). These electronic components generally includelaminated structures formed by stacking conducting films made ofconductive materials and insulating films made of insulative materials.A chip includes various functional element units corresponding to thetype of the chip, such as capacitor electrodes, inductor conductors,resistor conductors and impedance matching lines.

Moreover, numerous electric connectors are provided inside a chip inorder to construct these functional element units or to electricallyconnect the functional element units to one another. For example, a viahole penetrating an insulating film is used for connecting conductorsthat are laminated, as described above, with the insulating filminterposed therebetween. In addition, terminal electrodes are providedon an outer surface (such as a side surface, a bottom surface or a topsurface) of the chip to achieve electrical and mechanical connection tothe outside (such as a mounting board), and these terminal electrodesare also connected to the functional element units.

Further, a protective film is provided on the outer surface of the chipin order to: prevent short circuits, disconnection, degradation, andcorrosion inside the chip; and protect the chip from various treatmentliquids used in a manufacturing process or physical external forces,damages, moisture, and the like applied after the chip is mounted as aproduct.

Additionally, examples of the electronic components are disclosed in:Japanese Patent Application Publications Nos. Hei 9-270342, Hei11-154612 and Hei 9-270325 (see FIG. 7, Paragraphs 0045 and 0049)(hereinafter referred to as Patent Documents 1, 2 and 3, respectively).

SUMMARY OF THE INVENTION

Failures of connectors between conductors inside chips are sometimesfound in conventional electronic components. In this context, there isstill room for further improvement in light of enhancing reliability ofelectronic components.

To be more precise, when a chip is observed after pre- andpost-processing for forming a foundation layer of terminal electrodes,for example, after chemical cleaning such as a degreasing treatment, itis sometimes found that electrodes inside the chip are eroded orcorroded because the protective film is detached, or that residues existon interfaces between the protective film and the electrodes. Suchphenomena are similarly found: after pretreatment cleaning for barrelplating or chemical plating is performed to form a body layer or asurface layer of the terminal electrodes; or after flux cleaning isperformed to solder finished chips. After these electronic componentsare mounted on various devices and used for years as products, theabove-mentioned detachment, erosion, corrosion, residues, or the likemay degrade characteristics of the devices, and act as a cause oflowered durability.

Moreover, quality degradation such as IR (interconnection resistance)degradation or capacitor open/short defects is also sometimes found intests of reliability evaluation including a high humidity exposure test,a high humidity load test, a water absorption reflow test, and the like.Fluctuation is also found in threshold limit values in withstand voltagetests.

In addition to the degradation attributable to the above-describedchemical loads, defects attributable to physical and mechanical loadscan occur in a chip processing step. To be more specific, from theviewpoint of mass productivity, the above-mentioned electroniccomponents are usually manufactured by: depositing and laminating filmson a single base material (having numerous chips aggregated therein) tocollectively form internal conductors (functional element units); andthen cutting and dividing the base material into individual chips. Inthe processing step of dividing the collectively formed internalconductors into the individual chips, cutting burr may be generated orinterface detachment due to damages on the films may be caused.Meanwhile, the films per se contain residual stresses generated when thefilms are deposited and laminated. Although being suppressed when thechips are aggregated (the films are continuous on the whole basematerial), the residual stresses are released at the time of divisioninto the individual chips. Such release of the stress may also lead todetachment of the films inside each of the chips.

The electronic component disclosed in Patent Document 1 is not capableof protecting a connector between conductors as well as an interfaceportion between the conductor and a protective film or an insulatingfilm. Similarly, the electronic component disclosed in Patent Document 2is merely provided with a thick outermost layer, and is not capable ofparticularly protecting an interface between an insulating film and aconductor. Further, Patent Document 3 discloses a structure configuredto electrically connect an internal conductor covered with an insulatinglayer to an external connector terminal. However, this structureincludes an electrode extracting unit 16 formed as a through hole and anextraction electrode 17 made of a conductor filled in this through hole,and the extraction electrode 17 is provided to simply cover aninsulative resin layer 12. Accordingly, this structure cannot shieldtreatment liquids or moisture sufficiently.

Therefore, it is an object of the present invention to further improvereliability of an electronic component formed by laminating conductingfilms and an insulating film, by means of enhancing resistance of aconnector between conductors of the electronic component, or morespecifically by means of enhancing resistance of a via hole.

To solve the problems and to attain the object, a first electroniccomponent according to the present invention is an electronic componentprovided with a first conductor made of a conductive material, aninsulator made of an insulative material and configured to cover asurface of the first conductor, a via hole penetrating the insulator,and a second conductor made of a conductive material, located on asurface of the insulator, and electrically connected to the firstconductor through the via hole. Here, the electronic component includesa shielding film having conductivity, being interposed between the firstconductor and the second conductor, and covering an interface betweenthe first conductor and the insulator in the via hole by extendingcontinuously at least from the surface of the first conductorconstituting a bottom surface of the via hole to an inner wall surfaceof the via hole.

In the first electronic component of the present invention, theshielding film covers the interface between the first conductor and theinsulator disposed on the surface thereof inside the via hole.Accordingly, it is possible to protect the interface from infiltrationof various chemical solutions (including surfactant treatment fluidssuch as a degreasing fluid, etching fluids, and plating fluids, forexample), entry of moisture, and so forth.

The shielding film is formed so as to extend continuously at least fromthe surface of the first conductor constituting the bottom surface ofthe via hole to the inner wall surface of the via hole (the insulator).In addition, it is possible to allow the shielding film to continuouslycover an upper surface of the insulator (surrounding part of an upperend aperture of the via hole). The shielding film has conductivity.Therefore, it is possible to ensure electrical connection between thefirst conductor and the second conductor if the above-describedcontinuous coating is formed inside the via hole.

Here, regarding the first conductor and the second conductor, the firstconductor is typically an internal conductor located inside theelectronic component while the second conductor is typically a surfaceconductor located on an outer surface (such as a side surface, a topsurface or a bottom surface) of the electronic component. However, theconfiguration of the electronic component is not limited only to theforegoing. For example, the first conductor may be a conductor locatedon one surface of a substrate while the second conductor may be aconductor located on the other surface of the substrate. Alternatively,both of the first conductor and the second conductor may be internalconductors (such as in the case where a protective film having only aphysically protective function is provided on a surface of the secondconductor, so that an interface between the first conductor and theinsulator provided on the surface thereof is susceptible to damages bychemical solutions or gases). After all, the first conductor and thesecond conductor are the conductors respectively provided on bothsurfaces of the insulator so as to interpose the insulator therebetween.Moreover, the first conductor and the second conductor may be varioustypes and functions of conductors including terminal electrodes(external connection terminals) or part of such electrodes, wiring,inductor conductors, capacitor electrodes, impedance wiring, phaseadjusting lines, resistor conductors, and the like.

Moreover, the second conductor may be formed as a surface conductor (aside surface conductor) provided on a side surface of the electroniccomponent, and the shielding film may be formed so as to further cover arange from the inside of the via hole to the side surface of theelectronic component continuously. According to this structure, the sidesurface conductor (such as a side surface terminal electrode) can beformed by electrolytic plating while using the shielding film as afoundation electrode (a conducting layer). Hence, it is possible to omitan independent step of forming the foundation layer for the side surfaceconductor.

The shielding film is preferably made of a material having chemicalresistance, in particular resistance to at least any of a surfactanttreatment fluid, a degreasing fluid, an acidic chemical solution, analkaline chemical solution, a solvent (such as a developing agent forphotosensitive resin), alcohol, a plating fluid and an etching fluid.Moreover, the shielding film is preferably made of the material havingmoisture resistance, gas permeation resistance, and corrosion resistanceat the same time. Particularly, the shielding film of the presentinvention needs to be made of the material having resistance to variouschemicals and solvents used in the processes after the interface isformed between the conductors and the insulators.

To be more precise, the above-described shielding film may be formed asa film containing any of, for example, Cr, Ni, Ti, Cu, W, Ag, and Al asa main component. Since these materials have conductivity, it ispossible to establish electrical connection to the counterpart conductoreven when the entire surface of the conductor to be connected includingthe interface (a boundary) between the conductor and the insulator iscovered with the shielding film.

The shielding film is preferably formed by a vapor growth method. Forexample, when the shielding film is formed as a thin film by sputtering,it is possible to enhance bond strength of the shielding film andthereby to obtain an excellent shielding property. In addition to thesputtering method, it is also possible to form the shielding film byother vapor growth methods (such as an evaporation method or a CVD(chemical vapor deposition) method), electroless plating methods, and soforth. Meanwhile, the shielding film is preferably made of a dense filmin light of enhancing adhesion and a tracking property to leveldifferences. To be more specific, the shielding film may be formed ofthe film containing conductive particulates having grain diameters equalto or below 1.0 μm, preferably equal to or below 0.5 μm, and morepreferably equal to or below 0.1 μm.

Meanwhile, in addition to the insulating film for establishingelectrical insulation between the respective conductors provided in theelectronic component, the “insulator” in the present invention broadlyincludes various insulating films that contact the respective conductors(the first conductor, the second conductor, and connecting conductors),such as a dielectric film provided for forming a capacitor, a magneticfilm provided for forming an inductor, a protective layer formed on anoutermost layer of a chip in order to protect the electronic component,a planarizing film formed for planarizing a surface or a substrate.

A second electronic component according to the present invention is anelectronic component provided with a first conductor made of aconductive material, an insulator made of an insulative material andconfigured to cover a surface of the first conductor, a second conductormade of a conductive material and located on a surface of the insulator,a via hole penetrating the insulator, and a connecting conductor locatedinside the via hole and configured to electrically connect the firstconductor to the second conductor. Here, the electronic componentincludes a shielding film having conductivity, being interposed betweenthe first conductor and the connecting conductor, and covering aninterface between the first conductor and the insulator in the via holeby extending continuously at least from the surface of the firstconductor constituting a bottom surface of the via hole to an inner wallsurface of the via hole.

A third electronic component according to the present invention is anelectronic component provided with a first conductor made of aconductive material, an insulator made of an insulative material andconfigured to cover a surface of the first conductor, a via holepenetrating the insulator, a second conductor made of a conductivematerial and located on a surface of the insulator, and a connectingconductor located so as to be filled in the via hole and to electricallyconnect the first conductor to the second conductor. Here, theelectronic component includes a shielding film having conductivity,being interposed between the second conductor and the connectingconductor, and being configured to cover an interface between theconnecting conductor and the insulator by extending from a surface ofthe connecting conductor to the surface of the insulator around the viahole.

These second and third electronic components have the structures thatare suitably applicable to a filled via configured to fill the inside ofthe via hole penetrating the insulator with a conductive material suchas plated metal or conductive resin. The shielding film is provided soas to be interposed between the first conductor and the connectingconductor located inside the via hole and the first conductor toelectrically connect the first conductor to the second conductor, and isconfigured to cover the surface of the first conductor at the bottomsurface of the via hole and the inner wall surface of the via hole.Alternatively, the shielding film is provided so as to be interposedbetween the connecting conductor and the second conductor, and isconfigured to cover the surface (an upper surface) of the connectingconductor and surrounding part thereof (the surface of the insulator).In this way, it is possible to protect the interface between the firstconductor and the insulator or the interface between the connectingconductor and the insulator. Here, concrete configurations (such asmaterials) concerning the shielding films and the insulators are similarto those used in the first electronic component (the same applies to afourth electronic component described below).

Meanwhile, a fourth electronic component according to the presentinvention is an electronic component provided with a first conductormade of a conductive material, an insulator made of an insulativematerial and configured to cover a surface of the first conductor, asecond conductor made of a conductive material and located on a surfaceof the insulator, a via hole penetrating the insulator, and a filler tobe filled in the via hole so as to bury a space inside the via hole.Here, the electronic component includes a shielding film havingconductivity, being interposed between the first conductor and thefiller, and covering an interface between the first conductor and theinsulator in the via hole by extending continuously at least from thesurface of the first conductor constituting a bottom surface of the viahole to an inner wall surface of the via hole and further to the surfaceof the insulator around the via hole.

In this fourth electronic component, the filler is provided inside thevia hole instead of providing the connecting conductor. By providing thefiller as described above, even if a space is formed inside the via hole(or if a dent is formed on an upper surface of the via hole) afterformation of the shielding film, it is still possible to bury the spaceand to planarize the upper surface of the via hole. Accordingly, it ispossible to achieve film deposition (formation of the second conductorand other films thereon when applicable) favorably thereafter (the sameapplies to the second and third electronic component provided with theconnecting conductors). In this fourth electronic component, the fillermay be made of a material having no conductivity (or having lowconductivity), because electrical connection between the first conductorand the second conductor can be achieved through the shielding film byforming the shielding film having the conductivity so as to reach thesurface of the insulator around the via hole.

According to the electronic components of the present invention, theinterface (the boundary) between the conductor and the insulator insidethe via hole for connecting the conductors to each other is covered withthe shielding films as described above. Therefore, it is possible toblock infiltration of various chemical solutions used in the chipmanufacturing process into spaces between the conductors and theinsulators, and to prevent entry of moisture and the like after thechips are mounted as products. Meanwhile, even when an external force isapplied to the base material in an aggregate state containing the chipsat the time of processing or an external force is applied to the chipformed into an individual product, or when stress is applied to theinterface between the conductor and the insulator due to internalresidual stress, the shielding film suppresses detachment of the filmsby bearing such loads, thereby protecting the interface between theconductor and the insulator.

Further, in the electronic component according to the present invention,the via hole may be formed so as to set a ratio h/d between a depth hand a diameter d thereof within a range from 1 to 5 when appropriate.According to the present invention, the shielding film havingconductivity is formed in the via hole and this shielding film can beformed by a vapor growth method such as the sputtering method or the CVDmethod. Therefore, it is possible to increase an aspect ratio h/d of thevia hole (the ratio between the depth h and the diameter d of the viahole) significantly greater than a conventional via hole structureconfigured to establish interlayer connection by filling conductivepaste into a through hole. To be more precise, the ratio h/d is limitedto a range from about 0.2 to 2 in the related art. On the contrary,according to the present invention, it is possible to increase the ratioin the range from about 1 to 5 as described above. Therefore, thepresent invention also has an advantage that it is possible to reducespaces occupied by via holes and thereby to contribute to downsizing andhigh-density packaging of electronic components.

Meanwhile, a first method for manufacturing an electronic componentaccording to the present invention is a method for manufacturing anelectronic component having a first conductor forming step of forming afirst conductor made of a conductive material, an insulator forming stepof forming an insulator made of an insulative material, configured tocover a surface of the first conductor, and provided with a via hole,and a second conductor forming step of forming a second conductor madeof a conductive material, located on a surface of the insulator, andelectrically connected to the first conductor through the via hole. Themethod is carried out such that at least the first conductor formingstep and the insulator forming step are executed with a plurality ofelectronic components aggregated in a single base material so as toprovide the respective electronic components with the first conductors,the insulators, and the via holes, and that the base material is thencut into chips to obtain the individual electronic components. Here, themethod includes a shield film forming step of providing a shielding filmfor each of the electronic components aggregated in the base materialafter the insulator forming step and before the second conductor formingstep, the shielding film having conductivity, being interposed betweenthe first conductor and the second conductor, and covering an interfacebetween the first conductor and the insulator in the via hole byextending continuously at least from the surface of the first conductorconstituting a bottom surface of the via hole to an inner wall surfaceof the via hole.

A second method for manufacturing an electronic component according tothe present invention is a method for manufacturing an electroniccomponent having a first conductor forming step of forming a firstconductor made of a conductive material, an insulator forming step offorming an insulator made of an insulative material, configured to covera surface of the first conductor, and provided with a via hole, aconnecting conductor forming step of locating a connecting conductormade of a conductive material inside the via hole, and a secondconductor forming step of forming a second conductor made of aconductive material, located on a surface of the insulator, andelectrically connected to the first conductor through the connectingconductor. The method is carried out such that at least the firstconductor forming step, the insulator forming step, and the connectingconductor forming step are executed with a plurality of electroniccomponents aggregated in a single base material so as to provide therespective electronic components with the first conductors, theinsulators, the via holes, and the connective conductors, and that thebase material is then cut into chips to obtain the individual electroniccomponents. Here, the method includes a shield film forming step ofproviding a shielding film for each of the electronic componentsaggregated in the base material after the insulator forming step andbefore the connecting conductor forming step, the shielding film havingconductivity, being interposed between the first conductor and theconnecting conductor, and covering an interface between the firstconductor and the insulator in the via hole by extending continuously atleast from the surface of the first conductor constituting a bottomsurface of the via hole to an inner wall surface of the via hole.

A third method for manufacturing an electronic component according tothe present invention is a method for manufacturing an electroniccomponent having a first conductor forming step of forming a firstconductor made of a conductive material, an insulator forming step offorming an insulator made of an insulative material, configured to covera surface of the first conductor, and provided with a via hole, aconnecting conductor forming step of locating a connecting conductormade of a conductive material inside the via hole, and a secondconductor forming step of forming a second conductor made of aconductive material, located on a surface of the insulator, andelectrically connected to the first conductor through the connectingconductor. The method is carried out such that at least the firstconductor forming step, the insulator forming step, and the connectingconductor forming step are executed with a plurality of electroniccomponents aggregated in a single base material so as to provide therespective electronic components with the first conductors, theinsulators, the via holes, and the connective conductors, and that thebase material is then cut into chips to obtain the individual electroniccomponents. Here, the method includes a shield film forming step ofproviding a shielding film for each of the electronic componentsaggregated in the base material after the connecting conductor formingstep and before the second conductor forming step, the shielding filmhaving conductivity, being interposed between the second conductor andthe connecting conductor, and covering an interface between theconnecting conductor and the insulator by extending continuously from asurface of the connecting conductor to the surface of the insulatoraround the via hole.

Moreover, a fourth method for manufacturing an electronic componentaccording to the present invention is a method for manufacturing anelectronic component having a first conductor forming step of forming afirst conductor made of a conductive material, an insulator forming stepof forming an insulator made of an insulative material, configured tocover a surface of the first conductor, and provided with a via hole, avia filling step of filling the via hole with a filler for burying aspace inside the via hole, and a second conductor forming step offorming a second conductor made of a conductive material, located on asurface of the insulator, and electrically connected to the firstconductor through the connecting conductor. The method is carried outsuch that at least the first conductor forming step, the insulatorforming step, and the via filling step are executed with a plurality ofelectronic components aggregated in a single base material so as toprovide the respective electronic components with the first conductors,the insulators, the via holes, and the fillers, and that the basematerial is then cut into chips to obtain the individual electroniccomponents. Here, the method includes a shield film forming step ofproviding a shielding film for each of the electronic componentsaggregated in the base material after the insulator forming step andbefore the via filling step, the shielding film having conductivity,being interposed between the first conductor and the filler, andcovering an interface between the first conductor and the insulator inthe via hole by extending continuously at least from the surface of thefirst conductor constituting a bottom surface of the via hole to aninner wall surface of the via hole and further to the surface of theinsulator around the via hole.

According to the above-described manufacturing methods, it is possibleto efficiently manufacture highly reliable chips including the via holeshaving excellent resistance by forming the shielding filmssimultaneously on the a plurality of chips.

Moreover, in each of the above-described manufacturing methods, it ispreferable to planarize an upper surface of the via hole (make an uppersurface of the via hole flat) by providing any of the connectingconductor and the filler, or to planarize the upper surface of the viahole by polishing an upper surface of any of the connecting conductorand the filler after providing any of the connecting conductor and thefiller inside the via hole. Such a process is carried out in order toenhance adhesion between the connecting conductor and the secondconductor, or to favorably form various films provided on the via hole(the second conductor and other conducting films and insulating films tobe further provided thereon as appropriate), the via hole, or the like.

The second conductor may take the form of a terminal electrode forexternal connection, wiring to be provided on an outer surface of theelectronic component, and various other conductors. In this case, thesecond conductor may be formed before cutting the base material into thechips, or formed after cutting the base material into the chips(including the case where a supporting member on a back surface of thebase material is provided so as to maintain the individual chips in anarranged state without being scattered, even when the base material iscut (cut grooves are formed), for example).

According to the present invention, it is possible to enhance resistanceof a connection between a first conductor (such as an internalconductor) and a second conductor (such as a terminal electrode) andthereby to further improve reliability of an electronic component.

Other objects, features and advantages of the invention will becomeapparent from the following description of the embodiments of theinvention taken in conjunction with the accompanying drawings. In thedrawings, similar reference characters denote similar elementsthroughout the several views.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view schematically showing an electroniccomponent according to a first embodiment of the present invention.

FIG. 2 is a plan view schematically showing the electronic componentaccording to the first embodiment.

FIG. 3 is a cross-sectional view schematically showing a modifiedexample of the electronic component according to the first embodiment.

FIG. 4 is a cross-sectional view schematically showing another modifiedexample of the electronic component according to the first embodiment.

FIG. 5 is a cross-sectional view schematically showing substantial partof still another modified example of the electronic component accordingto the first embodiment.

FIG. 6 is a cross-sectional view schematically showing substantial partof still another modified example of the electronic component accordingto the first embodiment.

FIG. 7 is a cross-sectional view schematically showing substantial partof an electronic component according to a second embodiment of thepresent invention.

FIG. 8 is a cross-sectional view schematically showing substantial partof an electronic component according to a third embodiment of thepresent invention.

FIG. 9 is a cross-sectional view of a via hole of an electroniccomponent showing an application example of the present invention.

FIG. 10 is a cross-sectional view of a via hole of an electroniccomponent showing another application example of the present invention.

FIG. 11 is a cross-sectional view schematically showing still anothermodified example of the electronic component according to the firstembodiment.

DESCRIPTION OF THE EMBODIMENTS First Embodiment

FIG. 1 is a cross-sectional view schematically showing an electroniccomponent according to a first embodiment of the present invention. Asshown in the drawing, an electronic component (a chip) of thisembodiment includes abase substrate 1 constituting a core provided with:a planarization film 2, multiple conducting films 3 and 6 (internalconductors/wiring layers) laminated thereon; and an insulating film 5(inclusive of a dielectric film 4/insulating layers) interposed betweenthe conducting films for mutually insulating these conducting films, anda side surface terminal (a second conductor) 10 formed on a side surface1 a of the base substrate for serving as a terminal electrode forestablishing external connection. Moreover, a protective film 7 isformed on an outermost layer of the chip.

Note that FIG. 1 shows a structure to electrically connect the twoconducting films (a lower conductor 3 constituting an internal conductorand an upper conductor (a first conductor) 6 similarly constitutinganother internal conductor) to each other, and also to electricallyconnect these conducting films 3 and 6 to the side surface terminal (thesecond conductor) 10 through via holes 9 and 19. Moreover, with regardto the conducting films 3 and 6 illustrated in FIG. 1, the lowerconductor 3 located on a lower side and the upper conductor 6 located onan upper side constitute separate internal conductors belonging todifferent wiring layers laminated vertically in the chip, with theinsulating film 5 interposed therebetween. Here, only a connector ofboth of the conductors is shown in the drawing.

Moreover, in the case of this example, these internal conductors 3 and 6are connected to each other through the via hole 19 that penetrates theinsulating film 5 and the dielectric film 4, and these conductors areconnected to the side surface terminal 10 through the via hole 9 thatpenetrates the protective film 7. Instead, it is possible to connectonly one of the internal conductors (such as only the upper conductor 6or only the lower conductor 3) to the side surface terminal 10.Alternatively, it is possible to provide three or more internalconductors (meaning a structure to connect more internal conductorsthereto, i.e. a structure to connect respective internal conductors onthree or more wiring layers to another). Meanwhile, a surface conductorto be connected to the internal conductors is not limited only to theside surface terminal. Such surface conductors may be terminalelectrodes for external connection provided on a top surface or a bottomsurface of the chip (such as bottom surface terminals for a LGA (LandGrid Array) or a BGA (Ball Grid Array)), connecting pads for variouswire bonding techniques (such as wire bonding or flip-chip bondingassociated with one or more operations of ultrasonic oscillation,heating, and pressurization), other electrodes not provided for externalconnection or other internal conductors covered with insulators.

In this embodiment, the lower conductor 3 is formed on a surface of thebase substrate 1 that is smoothed by use of the planarization film 2,and the dielectric film 4 and the insulating film 5 including the viahole 19 are formed thereon. Then, the conductor is located inside thevia hole 19 and the upper conductor 6 to be electrically connected tothis conductor is provided on a surface of the insulating film 5. Afterforming the upper conductor 6, the protective film 7 including the viahole 9 is formed thereon.

Here, the respective via holes 9 and 19 can be formed by coating aphotosensitive resin (or a thermosetting resin or an ultraviolet curingresin) constituting the insulating film and the protective film, andthen subjecting the resin to pattern exposure and a development process(photolithography), for example. Alternatively, it is possible to formthe via holes 9 and 19 by irradiating a laser beam after depositing theinsulating film and the protective film, or by means of a mechanicalprocess (drilling).

For example, the planarization film 2 can be formed by use of Al₂O₃, andthe lower conductor 3 as well as the upper conductor 6 can be formed bydepositing a Ti film and a Cu film sequentially by means of sputteringand then precipitating the Cu film thereon by electrolytic plating whileusing these films as foundation films. Meanwhile, the conductors to belocated inside the via hole 19 can be formed by filling conductive resininto the via hole 19 or by precipitating plating metal by using thelower conductor 3 as a conducting body (or after forming the conductingfilm on an inner wall surface of the via hole 19 by electrolessplating), for example.

The dielectric film 4, the insulating film 5, and the protective film 7can be formed by use of resin (such as polyimide, epoxy resin,benzocyclobutene (BCB) or fluororesin) or inorganic materials (such asSiN, SiO₂, Al₂O₃ or TaO), for example. Here, it is also possible toprovide only one of the dielectric film 4 and the insulating film 5 onthe lower conductor 3 or the upper conductor 6. On the contrary, it isalso possible to laminate multiple insulating films or multipledielectric films (the same applies to other embodiments to be describedlater).

After forming the protective film 7, a shielding film 8 is provided inthe via hole 9 that penetrates the protective film 7. This shieldingfilm 8 is formed as the film that covers a surface of the upperconductor 6 constituting a bottom surface of the via hole 9, an innerperipheral surface of the protective film 7 constituting in inner wallsurface of the via hole 9, and a surface of the protective film 7 aroundan upper end aperture of the via hole 9, in order to protect aninterface 20 between the upper conductor 6 and the protective film 7.Moreover, this shielding film 8 is formed as a conducting film havingexcellent chemical resistance and achieving adhesion to the upperconductor 6 and the protective layer 7, such as a sputtered film made ofa material selected from Cr, Ni, Ti, Ni—Cr alloys, Cu, Ag, Al, and W,for example. Here, it is also possible to form the shielding film 8 bylaminating multiple layers (such as two layers, three layers, or four ormore layers) using these metal materials. For example, it is possible toform the shielding film 8 by sequentially laminating a Cr sputteredfilm, a Cu sputtered film, and Cu plated film. Likewise, the shieldingfilm 8 can be formed by using various other materials and in variousnumbers of laminated layers.

In addition, this shielding film 8 is preferably formed into a denseconducting film that contains small grain (grain diameter, for example,is equal to or below 1.0 μm, preferably equal to or below 0.5 μm, ormore preferably equal to or below 0.1 μm) by reducing a deposition ratein the sputtering process, for example, in order to achieve a shieldingperformance, adhesion, and a tracking performance to steps of theshielding film 8 favorably. Instead of sputtering, it is also possibleto form the shielding film by a vapor growth method such as anevaporation method or a CVD method, or by electroless plating.

After forming the shielding film 8, the side surface electrode 10 isformed so as to be electrically connected to the upper conductor 6through the via hole 9. Here, in this embodiment, the conductors 3 and6, the films 4, 5, 7, and 8, and the via holes 9 and 19 are formedsimultaneously on a plurality of chips in an aggregate state containingthe plurality of chips on a single base material (the base substrate)until formation of the shielding films 8. Thereafter, the base materialis cut into the individual chips and the side surface electrodes 10 areformed on the individual chips. Note that an end surface of the basesubstrate 1 indicated with reference numeral 1 a is the sectionedsurface, and the side surface electrode 10 is formed continuously overthis sectioned surface (the side surface of the base substrate (thechip)), a top surface of the chip, and a bottom surface of the chip intoa U shape in this embodiment.

This side surface electrode 10 can be formed by preparing a Cr film 11 aand a Cu film 11 b sequentially deposited by sputtering collectively asa foundation layer 11, then forming a Cu film 12 constituting a bodylayer of the electrode 10 thereon by barrel plating, and then forming aNi film 13 serving as a barrier layer and a Sn film 14 for enhancingsolder wettability sequentially thereon.

Connection between the side surface electrode 10 and the upper conductor6 is achieved by forming a top surface portion 10 a of the side surfaceelectrode, which is supposed to be disposed on the top surface of thechip, so as to extend to the bottom surface of the via hole 9 thatpenetrates the protective film 7. In this way, it is possible toelectrically connect the upper conductor 6 to the side surface electrode10 through the shielding film 8. FIG. 2 is a plan view showing an uppersurface side of the chip of this embodiment. As shown in the drawing,multiple pieces (two pieces in this embodiment) of the via holes 9penetrating the protective film 7 for connecting the top surface portion10 a of the side surface electrode 10 and the upper conductor 6 areprovided in this embodiment. The shielding film 8 is formed continuously(as a single film) over bottom surfaces and the inner wall surfaces ofthe respective via holes 9 and the surface of the protective film 7around the via holes. Meanwhile, the via holes 19 for connecting theupper conductor 6 to the lower conductor 3 are formed in positionsshifted from the via holes 9 when viewed from the top surface as shownin FIG. 2. Although the upper via holes 9 and the lower via holes 19 arealternately arranged in this embodiment as shown in the drawing, it isalso possible to form the via holes 9 immediately above the lower viaholes 19 in an overlapping manner (to apply a so-called via-on-via(stacked via) structure).

In addition to the above-described shape, the side surface electrode 10may be formed into an L shape as shown in FIG. 3, which extends from theside surface of the chip to the top surface (or the bottom surface)thereof. Alternatively, as shown in FIG. 4, the side surface electrodemay be formed into a plate shape provided on either the top surface orthe bottom surface of the chip. In the example shown in FIG. 4, it ispossible to use the shielding film 8 as the foundation film used forforming the electrode body layer 12. Accordingly, it is possible to omitthe foundation layer 11 for forming the electrode body layer 12 as shownin the example illustrated in FIG. 1 to FIG. 3.

The protective film 7 has been often provided as the outermost layer ofa chip in the related art as similar to this embodiment. Nevertheless,though the protective film of this type which has heretofore beenprovided can protect the electrodes such as wiring in a chip orfunctional films thereof physically or mechanically, the protective filmcannot completely protect an interface between an internal conductor andan insulating film such as a protective film from moisture or varioustreatment fluids. Therefore, conventional countermeasures have beenlimited only to lamination of multiple protective layers or molding acontour with resin. Such countermeasures lead to increases externalsizes and thicknesses of products and increases in manufacturing costsof electronic components. On the contrary, according to this embodiment,the interface between the internal conductor and the insulating film iscovered with the shielding film. Therefore, at the time when forming theside surface electrode, mounting the chip, or using the product, it ispossible to more securely prevent troubles such as infiltration of atreatment fluid or entry of moisture through the interface, which maycause corrosion and deterioration of the internal conductor.

Further, FIG. 5 shows an enlarged cross-sectional view schematicallyshowing substantial part (the connector between the surface conductor(the second conductor) and the internal conductor (the first conductor)corresponding to a section A in FIG. 4) of a modified example of theelectronic component according to this embodiment (the following FIGS. 6to 8 also show enlarged views of the connectors between the surfaceconductors (the second conductors) and the internal conductors (thefirst conductors) corresponding to the section A in FIG. 4 similarly toFIG. 5). As shown in FIG. 5, this modified example includes the upperconductor (the internal conductor being the first conductor) 6 locatedon the surface of the insulating film 5, the protective film 7 coveringthe surface of this upper conductor 6, the terminal electrode (thesurface conductor being the second conductor) 10 formed on the surfaceof the protective film 7, and the via hole 9 penetrating the protectivefilm 7 and reaching from the terminal electrode 10 to the upperconductor 6. However, the shield film 8 is formed of two layers oflaminated films 8 a and 8 b. For example, these laminated films may bedefined as a Cr film 8 a and a Cu film 8 b or a Ti film 8 a and a Cufilm 8 b, which are sequentially laminated in each case.

Meanwhile, the terminal electrode 10 to be formed on the shielding film8 may be defined as the set of the Cu film 12, the Ni film 13, and theSn film (or an Au film) 14 which are sequentially laminated, forexample. Depending on the size of the diameter of the via hole 9 or onthe thickness dimension of the shielding film 8, there is a case where adent is formed on the via hole 9 after forming the shielding film 8 asshown in FIG. 5, or a case where the via hole 9 is filled (buried) withthe material constituting the shielding film 8 and no dent is formedthereon. When forming the terminal electrode 10, the terminal electrode10 may be deposited by electrolytic plating, for example, when there isno dent. Alternatively, when there is a dent, the terminal electrode 10may be formed by burying the dent with a conductive material by means offilled via plating, for example.

Moreover, when a dent is formed on the via hole 9 after formation of theshielding film 8 as described above, it is also possible to form aburied electrode 15 for burying the dent on the shielding film insidethe dent as shown in FIG. 6. This buried electrode 15 can be formed: byprecipitating Cu with electrolytic plating; or by filling conductiveresin, for example. After providing the buried electrode 15 as describedabove, it is also possible to planarize an upper surface thereof by CMP(chemical mechanical polishing) or by buff polishing. In this way, it ispossible to bond the shielding film 8 favorably to the terminalelectrode 10 to be formed thereon.

In the example shown in FIG. 6, the shielding film 8 having conductivityis formed so as to cover the surface of the protective film 7 around thevia hole, so that the electrical connection between the upper conductor(the first conductor) 6 and the terminal electrode (the secondconductor) 10 is ensured by using this shielding film 8. Accordingly, itis also possible to bury the dent with a filler having no conductivity(or having low conductivity) instead of the buried electrode 15.

Second Embodiment

FIG. 7 is a cross-sectional view schematically showing substantial partof an electronic component according to a second embodiment of thepresent invention. As shown in the drawing, the electronic component ofthis embodiment includes the internal conductor (the first conductor) 6covered with the protective film 7 serving as the insulator, theterminal electrode (the second conductor) 10 provided on the surface ofthe protective film 7, the via hole 9 formed so as to penetrate theprotective film 7 in order to electrically connect this terminalelectrode 10 to the internal conductor 6, and the shielding film 8covering the interface 20 between the protective film 7 and the internalconductor 6 as similar to the first embodiment. However, the shieldingfilm 8 of this embodiment is configured to cover the surface of theinternal conductor 6 at the bottom surface of the via hole 9 and theinner wall surface of the via hole 9 only.

As similar to the first embodiment, the shielding film 8 may be formedby sequentially laminating two layers of the Cr film 8 a and the Cu film8 b or the Ti film 8 a and the Cu film 8 b. Here, the shielding film 8can be formed of a single film or a combination of three or more films(the same applies to other embodiments).

After formation of the shielding film 8, the buried electrode 15 similarto the one described in the modified example (FIG. 6) of the firstembodiment is formed thereon. The shielding film 8 and the buriedelectrode 15 inside the via hole are planarized by polishing so as to beflush with the surface of the protective layer 7. Then, the terminalelectrode 10 is formed thereon to electrically connect the internalconductor 6 to the terminal electrode 10 through the shielding film 8and the buried electrode 15. Here, the buried electrode 15 can be formedsimilarly to the modified example (FIG. 6) of the first embodiment bymeans of Cu plating or filling of the conductive resin, for example. Theplanarization may be performed by the CMP or buff polishing. Moreover,the terminal electrode 10 can be formed by sequentially forming the Cufilm 12, the Ni film 13, and the Sn film (or the Au film) 14, forexample.

Third Embodiment

FIG. 8 is a cross-sectional view schematically showing substantial partof an electronic component according to a third embodiment of thepresent invention. As shown in the drawing, the electronic component ofthis embodiment includes the internal conductor (the first conductor) 6covered with the protective film 7 serving as the insulator, theterminal electrode (the second conductor) 10 provided on the surface ofthe protective film 7, and the via hole 9 formed so as to penetrate theprotective film 7 in order to electrically connect this terminalelectrode 10 to the internal conductor 6 as similar to the first andsecond embodiments. However, the via hole 9 is formed as a filled via byfilling the via hole with a conductor (a connecting conductor) 16, andthe shielding film 8 is provided on a surface (a top surface) of thisconnecting conductor 16.

For example, the connecting conductor 16 may be formed by Cu plating, Cufilled via plating, or filling of the conductive resin as similar toformation of the buried electrode 15. The top surface thereof may beplanarized by the CMP or buff polishing so as to be flush with thesurface of the protective film 7. Thereafter, the shielding film 8 isformed on the connecting conductor 16 and on the protective film 7.Here, this shielding film 8 is formed so as to cover the entire topsurface of the connecting conductor 16 and the surface of the protectivelayer 7 around the connecting conductor 16. In this way, it is possibleto protect an interface between the connecting conductor 16 and theprotective film 7. The shielding film 8 may be formed of a set of the Crfilm (or the Ti film) 8 a and the Cu film 8 b to be deposited thereon.

After providing the shielding film 8, the terminal electrode 10 isformed so as to cover the shielding film 8. This terminal electrode 10can be formed by sequentially laminating the Cu film 12, the Ni film 13,and the Sn film (or the Au film) 14, for example.

Although embodiments of the present invention have been described above,it is to be noted that the present invention is not limited only to theembodiments disclosed herein. It is obvious to those skilled in the artthat various modifications are possible without departing from the scopeof the invention as defined in the appended claims.

For example, various other modes of the materials, the numbers oflaminated layers, and the methods of formation of the respective filmson the base material including the respective film constituting theterminal electrode are applicable in addition to the configurationsdescribed above. Moreover, in addition to Cu, the internal conductors(the upper conductor (the first conductor) and the lower conductor) mayapply other materials having low electric resistance such as Ag, Al orW. Further, the embodiment (FIG. 1) illustrates two conducting films asthe internal conductors, the single insulating film, and the singledielectric film. However, any of these films may be provided in anarbitrary number equal to or more than one layer. When the chip does notinclude a capacitor as the functional element unit therein, it is notnecessary to provide a dielectric layer.

Moreover, according to the present invention, it is also possible toform both of the first conductor and the second conductor on thesurfaces of the substrate. To be more precise, as shown in FIG. 9 andFIG. 10, it is also possible to form the shielding film 8 in a structurein which the first conductor 6 is located on one surface of thesubstrate 1 while the second conductor 10 to be electrically connectedthereto is formed on the other surface of the substrate 1 so that thefirst conductor 6 is electrically connected to the second conductor 6through the via hole 9 penetrating the substrate (the insulator) 1.Meanwhile, as shown in FIG. 11, it is also possible to form theshielding film 8 not only being on the via hole section but alsoextending to the side surface of the chip continuously, for example. Inthis configuration, it is also possible to use the shielding film 8 as afoundation electrode of the side surface terminal 10 (to form therespective layers constituting the terminal electrode on the shieldinglayer 8).

In the meantime, FIG. 1 and FIG. 11 describe a case of forming theconductive films, the insulating film, and the via holes provided withthe shielding film only on the upper surface side of the base substrate1. However, it is also possible to form one or more layers of any of theconductive films, the insulating films, and other films on the lowersurface side of the base substrate and to connect the conductive filmspenetrating the insulating film. In this respect, it is possible toprovide the shielding film configured to cover the interface between theconductor and the insulator by applying the present invention similarlyto the configuration on the upper surface of the substrate. In thiscase, for example, it is also possible to use the respective structuresshown in FIGS. 4 to 8 as a via hole structure to be provided on thelower surface side of the base substrate 1 (it is also possible to usethe respective structures shown in FIGS. 4 to 8 for the via holes to beprovided on the upper surface side of the substrate). Meanwhile, in thechip structure shown in FIG. 11, it is also possible to form theshielding film 8 continuously from the via hole on the upper side of thesubstrate to the side surface of the chip and further to the via hole onthe lower surface side of the substrate.

What is claimed is:
 1. An electronic component comprising: a firstconductor made of a conductive material; an insulator made of aninsulative material and configured to cover a surface of the firstconductor; a second conductor made of a conductive material and locatedon a surface of the insulator; a via hole penetrating the insulator; afiller filled in the via hole so as to bury a space inside the via hole;and a shielding film having conductivity, being interposed between thefirst conductor and the filler, and covering an interface between thefirst conductor and the insulator in the via hole by extendingcontinuously at least from the surface of the first conductorconstituting a bottom surface of the via hole to an inner wall surfaceof the via hole and further to the surface of the insulator around thevia hole.
 2. The electronic component according to claim 1, wherein thesecond conductor is part of a side surface conductor provided on a sidesurface of the electronic component, the shielding film is formed tofurther cover the side surface of the electronic component, and the sidesurface conductor is formed on the shielding film.
 3. The electroniccomponent according to claim 1, wherein the second conductor is aterminal electrode provided on any of a top surface and a bottom surfaceof the electronic component.
 4. The electronic component according toclaim 1, wherein the shielding film is the film having at least any ofresistance to a surfactant treatment fluid inclusive of a degreasingfluid, resistance to an acidic chemical solution, resistance to analkaline chemical solution, resistance to a solvent, resistance toalcohol, resistance to a plating fluid, resistance to an etching fluid,moisture resistance, gas permeation resistance, and corrosionresistance.